SHINY M.I

Shiny M I

Assistant Professor

You take your life in your own hands, and what happens? A terrible thing, no one to blame

Pursuing Ph.D  in  Amrita Vishwa Vidyapeetham

M.E from Maharaja College of Engineering,coimbatore(Anna University)

B.Tech from Jyothi Engineering College,Cheruthuruthy(Calicut University)

Currently working at jyothi engineering college as an assistant professor

Areas of Specialization

Applied Electronics

Areas of Interest

Low Power VLSI  Design,Design for Testing

Sno. Achievement Year
1

Shiny M.I, “Energy Recovery and clock gating scheme for multiplier”, Presented in International Conference on advanced computing and communication(ICACC) 3-4 May 2010, conducted in Amal Jyothi Engg.College,Kottayam. 

2010
2

Venugopal K, Edwin Andrews, Devika Mohan S, Anjali V S, Shiny M.I,  ”Acase study on human computer interaction through virtual mouse”,IEEE sponsord International Conference on ( ICIICS’16) on 17th and 18th March 2016.

2016
3

Shiny M I."LFSR Based secured Scan Design Testability Techniques",paper presented in 7th International Conference on Advances in Computing & Communications, ICACC-2017, 22-24 August 2017, Cochin, India.

2017
4

Shiny M I “LFSR Based secured Scan Design Testability    Techniques", in  Procedia Computer Science (Elsevier, Scopus) 2017, vol .115 , pp 174-181.

2017
5

Shiny M I, Nirmala Devi M, “Trustworthy Scan Design and Testability Using Obfuscation and Logic Locking Scheme for Wireless Network Application”, Journal of Mobile Networks and Applications (Springer, SCI).volume 27, pages1000–1018 (2022)

2022
6

Shiny M I, Nirmala Devi M, “Trustworthy Scan Design and Testability Using Obfuscation and Logic Locking Scheme for Wireless Network Application”, Journal of Mobile Networks and Applications (Springer, SCI).volume 27, pages1000–1018 (2022)

2022
7

Shiny M I, Nirmala Devi M, “Trustworthy Scan Design and Testability Using Obfuscation and Logic Locking Scheme for Wireless Network Application”, Journal of Mobile Networks and Applications (Springer, SCI).volume 27, pages1000–1018 (2022)

2022
8

Shiny M I, Nirmala Devi M, “Trustworthy Scan Design and Testability Using Obfuscation and Logic Locking Scheme for Wireless Network Application”, Journal of Mobile Networks and Applications (Springer, SCI).volume 27, pages1000–1018 (2022)

2022

1.Shiny M.I"A case study on human computer interaction through virtual mouse",IEEE Sponsord International Conference on Innovation in Information ,Embedded and Communication Systems(ICIIECS’16),organized byKarpagam University on 17TH &18TH March 2016.

2.Shiny M.I"Energy Recovery and clock gating scheme for Multiplier", International Conference on  Advanced Computing and Communication ICACC-2010, May 3rd &4th, organised by Amal  Jyothi College of Engineering Kanjirapilly.

3.Shiny M I."LFSR Based secured Scan Design Testability Techniques", paper presented in 7th International Conference on Advances in Computing & Communications, ICACC-2017, 22-24 August 2017, Cochin, India.

4.Shiny M I, Nirmala Devi M, “LFSR Based secured Scan Design Testability    Techniques", in  Procedia Computer Science (Elsevier, Scopus) 2017, vol .115, pp 174-181.

5.Shiny M I, Reshma R, Shine Rose, Siji “Security Systems in Design for Testing” in Soft  Computing and Signal Processing 51, DOI:10.1007/978-981-13-3393-4_51(Springer).

6. Shiny M I, Nirmala Devi M,” Embedded PUF based Secured Design for Testing with On-Chip Comparison”, International Journal of Cloud Computing, Published by Inderscience (Scopus).

 7. Shiny, M.I.,Fredy, A.,Jose, J.Jeseena, P.K. Rohith,Covid-19 Protocol Enhanced Using Computer Vision System,  3rd IEEE International Virtual Conference on Innovations in Power and Advanced Computing Technologies, i-PACT 2021, 2021

8. Shiny, M.I., Nirmala Devi, M. Trustworthy Scan Design and Testability Using Obfuscation and Logic Locking Scheme for Wireless Network Application:Mobile Networks and Applicationsthis link is disabled, 2022, 27(3), pp. 1000–1018

 

Sl. No.

FDP Details 

Venue 

Duration

Resource Person/ Participant

Academic Year-2008-09

1

National level one day workshop on Advanced Electrical Machine& DSP Preocessors

. MET’S School of Engineering Mala

6th December

Participant

 

 

 

 

 

Academic Year-2009-10

1

Workshop on Artificial Intelligence System

Sahrdaya College of Engineering &technology

26th to 28th March 2009

Participant

2

AICTE Sponsored  FDP on VLSI and Embedded Systems

Jyothi Engineering College, Cheruthuruthy

3rd to 14th August

Participant

Academic Year-2010-11

1

National level signal processing  Organized by ISTE

Jyothi Engineering College, Cheruthuruthy

26th ,27th November

Participant

2

Workshop on Teaching and Learning VLSI design

Amrita Viswa Vidyapeetham

1st to 4 December

Participant

3

AICTE FDP on Nanoelectronics

NIT, Calicut

10th to 21th May 2010

Participant

Academic Year-2011-12

1

National level FDP on VLSI

Jyothi Engineering College, Cheruthuruthy

15th to 17th  December

Participant

2

National seminar on emerging trends in science and current affairs

Jyothi Engineering College, Cheruthuruthy

6th ,7th February

Participant

3

Workshop on effectiveness in teaching –learning Process

Jyothi Engineering College, Cheruthuruthy

20th ,21th April

Participant

Academic Year-2012-13

1

2 day residential Training programme for improving Professional Excellency of Faculty of Jyothi Engineering college

CSR Pariyaram, Chalakkudy

5th to 6th  July 2013

Participant

Academic Year-2013-14

1

Workshop on IC Design Flow

Sreepathy Institute of Management and Technology

30th ,31st August 2013

Participant

2

ISTE Sponserd  National level FDP on Design ,Testing and Launching of satellite Systems

 

6th to 8th February 2013

Convenor

Academic Year-2014-15

1

National Symposium on  Green Electronics

.Amrita Viswa Vidyapeetham

12th,13th December 2014

Participant

2

Two day National Workshop on Intellectual Property Rights and Research Funding Possibilities  Jointly organized by Department of Electronics & Communication Engineering

Jyothi Engineering College, Cheruthuruthy.

16th & 17th  January 2015

Participant

3

QIP Sponsored STTP on Hands on Training on FPGA based Embedded System Design

GEC,Thrissur

17th to 21st March 2014

Participant

Academic Year-2015-16

1

International conference on VLSI Design & Embedded Systems

Bangalore

3rd to 4 th January 2015

Participant

2

Nodal centre conference

Amrita Viswa Vidyapeetham

21st may 2015

Nodal Coordinator

1

7 days Faculty development programme on Empowering through Team Work

Jyothi Engineering College, Cheruthuruthy.

1st to 7th June

Participant

2

Seminar on Materials, Processes and devices for flexible electronics

PSG,Coimbatore

14th to 15th December 2015

Participant

Academic Year-2016-17

1

7 days Faculty development programme on Performance based on work Ethic

Jyothi Engineering College, Cheruthuruthy

16th to 22nd June 2016

Participant

Sno. Projects Guided Year
1

SECURE SCAN DESIGN USING
SCRAMBLING TECHNIQUE”

2020
2

SECURITY SYSTEMS IN DFT

2018
3

DESIGN OF USB BASED SIMULATED INPUT PROFILE GENERATOR FOR EVALUATION OF INERTIAL NAVIGATION SYSTEM

2017
4

A case study on human computer interaction through virtual mouse

2016
5

Digital Lock Security System

2016